pkarashchenko commented on code in PR #12843:
URL: https://github.com/apache/nuttx/pull/12843#discussion_r1704700308
##########
arch/risc-v/src/common/espressif/esp_mcpwm.c:
##########
@@ -58,153 +63,1338 @@
# define MCPWM_DEV_CLK_SOURCE SOC_MOD_CLK_PLL_F160M
#endif
-#define MCPWM_DEV_CLK_PRESCALE 4
+#define MCPWM_DEV_CLK_PRESCALE 1
#define MCPWM_CAPTURE_DEFAULT_GROUP 0
+#define GPIO_IN_FUNCTION INPUT_FUNCTION_2
+#define GPIO_OUT_FUNCTION OUTPUT_FUNCTION_2
+
+#ifdef CONFIG_ESP_MCPWM_MOTOR_BDC
+
+/* Peak counter at 13330 in up-down mode allows frequencies at a prescale
+ * of: 2 kHz @ 2; 1.5 kHz @ 3; 1.2 kHz @ 4; 1 kHz @ 5.
+ */
+#ifndef CONFIG_ARCH_CHIP_ESP32H2
+# define PEAK_COUNTER 13330
+# define MCPWM_MAX_PWM_OUT_FREQ 3000
+# define MCPWM_MIN_PWM_OUT_FREQ 25
+#else
+# define PEAK_COUNTER 9595
+# define MCPWM_MAX_PWM_OUT_FREQ 2500
+# define MCPWM_MIN_PWM_OUT_FREQ 20
+#endif
+#endif
+#ifdef CONFIG_ESP_MCPMW_MOTOR_CH0_FAULT
+# define ESP_MCPMW_MOTOR_FAULT
+#endif
/****************************************************************************
* Private Types
****************************************************************************/
-struct mcpwm_dev_common_s
+typedef enum
+{
+ MCPWM_GENERATOR_0,
+ MCPWM_GENERATOR_1,
+ MCPWM_GENERATOR_MAX
+} mcpwm_generator_e;
+
+typedef enum
+{
+ MCPWM_OPERATOR_0,
+ MCPWM_OPERATOR_1,
+ MCPWM_OPERATOR_2,
+ MCPWM_OPERATOR_MAX
+} mcpwm_operator_e;
+
+typedef enum
+{
+ MCPWM_TIMER_0,
+ MCPWM_TIMER_1,
+ MCPWM_TIMER_2,
+ MCPWM_TIMER_MAX
+} mcpwm_timer_e;
+
+typedef enum
+{
+ MCPWM_FAULT_0,
+ MCPWM_FAULT_1,
+ MCPWM_FAULT_2,
+ MCPWM_FAULT_MAX
+} mcpwm_fault_e;
+
+typedef enum
+{
+ MCPWM_MOTOR_CHANNEL_0,
+ MCPWM_MOTOR_CHANNEL_1,
+ MCPWM_MOTOR_CHANNEL_2,
+ MCPWM_MOTOR_CHANNEL_MAX
+} mcpwm_motor_channel_e;
+
+enum mcpwm_capture_channel_e
+{
+ MCPWM_CAP_CHANNEL_0,
+ MCPWM_CAP_CHANNEL_1,
+ MCPWM_CAP_CHANNEL_2,
+ MCPWM_CAP_CHANNEL_MAX
+};
+
+struct mcpwm_dev_common_s
+{
+ mcpwm_hal_init_config_t group;
+ mcpwm_hal_context_t hal;
+ spinlock_t mcpwm_spinlock;
+ bool initialized; /* MCPWM periph. and HAL has been initialized */
+ bool isr_initialized; /* Shared ISR has been initialized */
+ int group_prescale;
+};
+
+#ifdef CONFIG_ESP_MCPWM_MOTOR
+
+struct mcpwm_motor_lowerhalf_s
+{
+ /* The following block is part of the upper-half device struct */
+
+ FAR const struct motor_ops_s *ops; /* Arch-specific operations */
Review Comment:
Please remove `FAR` from riscv related code
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