I have a 100ns window to latch on and my micro is not fast enough. I don't
want to go to a faster micro for many reason including power, size, cost.

On Thu, Jun 2, 2011 at 10:57 AM, <si...@mungewell.org> wrote:

> > Sounds like a CPLD may be a better solution. They are also easier to
> > get in low pin count packages. The older models also come in packages
> > that can be socketed, if that is of any concern.
>
> I would agree that a CPLD would probably be more appropriate, however may
> be that your 'problem' can also be solved by a micro depending on the
> complexity of the logic and required speed.
>
> For those who don't know a CPLD is basically a set of D-Type latches fed
> with AND/OR matrix, which can be configured to perform logic functions or
> even to run simple state machines.
>
> A FPGA is more versatile, but generally a lot more complex/expensive.
> Simon
>
>
>
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