> Sounds like a CPLD may be a better solution. They are also easier to > get in low pin count packages. The older models also come in packages > that can be socketed, if that is of any concern.
I would agree that a CPLD would probably be more appropriate, however may be that your 'problem' can also be solved by a micro depending on the complexity of the logic and required speed. For those who don't know a CPLD is basically a set of D-Type latches fed with AND/OR matrix, which can be configured to perform logic functions or even to run simple state machines. A FPGA is more versatile, but generally a lot more complex/expensive. Simon _______________________________________________ clug-talk mailing list clug-talk@clug.ca http://clug.ca/mailman/listinfo/clug-talk_clug.ca Mailing List Guidelines (http://clug.ca/ml_guidelines.php) **Please remove these lines when replying
