Hi,
>> I find that hard to believe. All routers, even old ISR G1s have ECC to detect >> such failures. Depending on the platform and configuration, those boxes may >> crash/failover due to parity errors, right? > > Sure about that? TX Ring and RX Ring have ECC memory? Do you know full path > from ingress to egress and know for a fact that each place is ECC? No, I don't know. That was rather a humble assumption (if the control plane RAM is ECC, shouldn't the forwarding plane also be ECC?). Regards, Lukas _______________________________________________ cisco-nsp mailing list [email protected] https://puck.nether.net/mailman/listinfo/cisco-nsp archive at http://puck.nether.net/pipermail/cisco-nsp/
