On (2014-02-17 19:13 +0000), Phil Mayers wrote: > As someone else has pointed out, the Cisco description is of a > sudden hard failure triggered by a power cycle, not some kind of > progressive degradation AFAICT. > > Do you have information to the contrary?
No. It was more of a general question of what type of memory failure is acceptable and will we pay premium for product which has more graceful failure-modes. I recently ran into (likely) memory issue which caused sporadic corruption in IP header, had it occurred anywhere else than IP headers or were we IPv6 only, it would have been invisible to me. Is there 98.7% probability that some kit in my network is currently corrupting packets outside header? -- ++ytti _______________________________________________ cisco-nsp mailing list [email protected] https://puck.nether.net/mailman/listinfo/cisco-nsp archive at http://puck.nether.net/pipermail/cisco-nsp/
