[clang] [llvm] [RISC-V] Add support for MIPS P8700 CPU (PR #117865)

[Craig Topper via cfe-commits]

================
@@ -427,7 +427,7 @@ def UNZIP_RV32 : Unary_r<0b000010001111, 0b101, "unzip">,
 // Pseudo Instructions
 
//===----------------------------------------------------------------------===//
 
-let Predicates = [HasStdExtZba, IsRV64] in {
+let Predicates = [HasStdExtZba, IsRV64], EmitPriority = 0 in {
----------------
topperc wrote:

Why this change?

https://github.com/llvm/llvm-project/pull/117865
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