================ @@ -522,6 +526,28 @@ let Predicates = [BPFNoALU32] in { } def STD : STOREi64<BPF_DW, "u64", store>; +class relaxed_store<PatFrag base> + : PatFrag<(ops node:$val, node:$ptr), (base node:$val, node:$ptr)> { + let IsAtomic = 1; + let IsAtomicOrderingReleaseOrStronger = 0; +} + +class releasing_store<PatFrag base> + : PatFrag<(ops node:$val, node:$ptr), (base node:$val, node:$ptr)> { + let IsAtomic = 1; + let IsAtomicOrderingRelease = 1; +} ---------------- peilin-ye wrote:
Got it, thanks for the input! I also found this in [Instruction-Level BPF Memory Model](https://docs.google.com/document/d/1TaSEfWfLnRUi5KqkavUQyL2tThJXYWHS15qcbxIsFb0/edit?usp=sharing), section "Atomic Loads" : > For `__ATOMIC_RELAXED`, these can simply be implemented as plain BPF load > instructions. https://github.com/llvm/llvm-project/pull/108636 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits