================ @@ -1859,6 +1867,34 @@ void AArch64DAGToDAGISel::SelectFrintFromVT(SDNode *N, unsigned NumVecs, SelectUnaryMultiIntrinsic(N, NumVecs, true, Opcode); } +template <int64_t Max> +void AArch64DAGToDAGISel::SelectMultiVectorLuti(SDNode *Node, + unsigned NumOutVecs, + unsigned Opc) { + if (ConstantSDNode *Imm = dyn_cast<ConstantSDNode>(Node->getOperand(4))) + if (Imm->getZExtValue() > Max) + return; + + SDValue ZtValue; + ImmToTile<AArch64::ZT0, 0>(Node->getOperand(2), ZtValue); ---------------- MDevereau wrote:
I've added a check for ImmToTile returning false. Using 1 instead of 0 will cause it to crash, but now it will give a diagnostic saying it cannot lower intrinsic instead of crashing with no reason why. https://github.com/llvm/llvm-project/pull/73317 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits