sdesmalen added inline comments.

================
Comment at: clang/test/CodeGen/aarch64-sve-inline-asm.c:1
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -emit-llvm -target-feature 
+sve -o - %s | FileCheck %s
+
----------------
rovka wrote:
> Can you also add a test without +sve, to make sure we get a diagnostic?
Without the `-emit-llvm` part this test invokes (and tests the diagnostic of) 
the compiler. I don't think this is what we want. At the same time, this code 
should probably still continue match the z and p registers even if the target 
feature is not given, and thus leave it to LLVM to determine whether the use of 
these registers makes sense or not. So removing `-target-feature +sve` from the 
RUN line should be sufficient here. @rovka do you agree?


================
Comment at: clang/test/CodeGen/aarch64-sve-inline-asm.c:12
+      "add z31.d, p0/m, z31.d, z31.d\n"
+      : "=w"(t)
+      :
----------------
There is no variable linked to `t` in this inline asm, so you can remove this 
clause.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D64739/new/

https://reviews.llvm.org/D64739



_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

Reply via email to