rovka added inline comments.
================ Comment at: clang/lib/Basic/Targets/AArch64.cpp:307 - // 32-bit floating point regsisters + // 32-bit floating point registers "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", "s8", "s9", "s10", "s11", ---------------- You should commit the typo fixes separately. ================ Comment at: clang/test/CodeGen/aarch64-sve-inline-asm.c:1 +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -emit-llvm -target-feature +sve -o - %s | FileCheck %s + ---------------- Can you also add a test without +sve, to make sure we get a diagnostic? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D64739/new/ https://reviews.llvm.org/D64739 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits