> On Feb 19, 2025, at 11:44 AM, Chuck Guzis via cctalk <cctalk@classiccmp.org> 
> wrote:
> 
> Don't know if it was mentioned, but the NS16032 (later renamed to
> NS32016) employed two stack pointers (SP0 and SP1), but the
> implmentation was one for user stack and the other for interrupts.
> Which only made sense--you don't want your privileged-mode ISRs
> corrupting the user stack or vice-versa.
> 
> --Chuck

So do PDP-11 and VAX, but that isn't really what the original question was 
about.  For those, there is only one stack at a time, but a different internal 
register in the CPU is referenced when the "stack pointer" is needed, depending 
on the current mode.

An interesting variation of that is the Philips PR8000, which has 8 general 
registers (well, one of the 8 is the PC, like on the PDP11) though no stack.  
But actually it has 8 sets of 8 registers, one for each processor priority 
level.  So an interrupt automatically preserves the previous registers, and the 
interrupt handler address is simply the value found in R0 (the PC) for that 
level.

        paul

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