On 2/1/25 02:31, Frank Leonhardt via cctalk wrote:
> On 31/01/2025 18:55, Steve Lewis via cctalk wrote:

> As I've mentioned elsewhere, "UART" is Intel's term for an ACIA; and
> other names exist from other manufacturers. Just a buffered shift
> register and other logic in the same chip.

The veneered and generated Intel 8251 is a USART--as were other similar
chips (8274, Zilog SIO, etc.)--capable of both asynchronous and
asynchronous data transfer.  Synchronous for block/bulk transfer is far
superior in terms of carrying capacity  (no start/stop "bits"; note the
quotes; asynchronous "stop" is simply a pause between characters) and
was very common in the 1960s and 1970s.  Many a hobbyist has scrounged a
"good deal" used terminal only to find that it was block-mode synchronous.

As far as integration, the original LSI chipsets employed separate
devices for transmitting and receiving data.

Current-loop is probably still employed extensively in heavy
industry--better noise immunity and distance.  One used to (in the
1970s) be able to purchase off-the-shelf "long haul" modems that
converted between EIA signal levels and current-loop.   One of the
benefits of CL is that detecting a break in the line is simple--not so
for the voltage-oriented EIA signalling (RS-442, 232, 449, etc.).  The
disadvantage is that signalling is done over a single wire pair--no
"handshaking signals.

If the 25-way DSUB connector bothers you, have a look at RS-449, which
employs a 37-way (DC37) connector: https://en.wikipedia.org/wiki/RS-449

--Chuck



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