> On Aug 23, 2019, at 1:47 PM, Noel Chiappa via cctalk <cctalk@classiccmp.org>
> wrote:
>
>> From: Jon Elson
>
>>> On 08/22/2019 12:47 PM, Tom Uban via cctalk wrote:
>
>>> On a possible related note, I am looking for information on converting
>>> CISC instructions to VLIW RISC.
>
>> I think it might end up looking a bit like the optimizers that were
>> used on drum memory computers back in the dark ages.
>
> I dunno; those were all about picking _addresses_ for instructions, such
> that the next instruction was coming up to the heads as the last one
> completed.
>
> The _order_ of execution wasn't changed, there was no issue of contention
> for computing elements, etc - i.e. all the things ones think of a
> CISC->VLIW translation as doing.
Instruction ordering (instruction scheduling) is as old as the CDC 6600, though
then it was often done by the programmer.
An early example of that conversion is the work done at DEC for "just in time"
conversion of VAX instructions to MIPS, and later to Alpha. I wonder if their
compiler technology was involved in that. It wouldn't surprise me. The Alpha
"assembler" was actually the compiler back end, and as a result you could ask
it to optimize your assembly programs. That was an interesting way to get a
feel for what transformations of the program would be useful given the
parallelism in that architecture.
paul
