On 11/19/2017 2:43 PM, Eric Smith wrote:
Similarly for how the card deals with interrupts, but using the IEI
and IEO as the daisy chain.
Thanks for the context. I think the fact that !BUSAK is present on A31
threw me
https://www.retrobrewcomputers.org/lib/exe/fetch.php?media=boards:ecb:backplane-3:backplane.pdf
and the fact that I don't see that the ECB routes BUSAK from the CPU
card to BAI of the first slot
Parallel arbitration can be done with the same slot pin assignments,
but instead of busing the request and daisy-chaining the acknowledge,
the requests are each separately fed into a priority encoder. The
"any" output of the encoder goes to the request input of the CPU. The
acknowledge from the CPU goes into the enable of a decoder, and the
select inputs of the decoder come from the priority encoder, so that
each slot gets its own decoded acknowledge signal to its BAI input.
In this case the backplane doesn't connect the BAO output of a slot to
anything. This parallel arbitration scheme can be used for bus
request and/or interrupt request.
I like this idea better. Is there any implementation docs you might
suggest? (I have the Bus Handbook on order, but it has not arrived)
I also am unclear on how ECB handles dual CPUs, if it does at all.
Jim
Eric
--
Jim Brain
br...@jbrain.com
www.jbrain.com
