> On Mar 7, 2017, at 3:42 PM, Maciej W. Rozycki via cctech > <cct...@classiccmp.org> wrote: > > On Tue, 28 Feb 2017, Angelo Papenhoff via cctech wrote: > >> I'm wondering where the MIPS I-IV standards that are referenced >> everywhere are defined. I was able to actually find what seems to be the >> IV standard [1] but found no such thing for I-III. I didn't even find >> any bibliographic references to them. Did they only exist as printed >> books and nobody bothered to scan them? Or are they under copyright? >> Would be nice to have them accessible somewhere. >> >> [1] >> http://www.cs.cmu.edu/afs/cs/academic/class/15740-f97/public/doc/mips-isa.pdf > > < snip >
> I have seen a copy of the original R2000 manual once, in the form of a > collection of pages in a ring binder. That copy may have been lost since. > Silicon manufacturers like IDT, LSI Logic, Performance Semiconductor or > Siemens published their R2000/R3000 (and R2010/R3010 FPA) implementation > manuals though that may serve as a reference; you should be able to track > down scanned copies online. The book “MIPS RISC Architecture” by Gerry Kane (ISBN 0-13-584293-X), copyright 1989 by MIPS Computer Systems, has the following blurb as the preface: “This book is a comprehensive reference for the MIPS RISC architecture. It describes the functional characteristics and capabilities of the R2000/R3000 Processors and the R2010/R3020 floating point accelerators.” I suspect this is as close to a publicly available architecture reference that exists for that generation of MIPS processors. - Rob
