On 2017-02-03 5:05 PM, Adrian Graham wrote:
On 03/02/2017 20:38, "Paul Berger" <phb....@gmail.com> wrote:
As I have said before, the most important piece of test gear is a
brain.
-tony
...And if you don't have a schematic, you ring out the connections and
draw your own...
I'm not yet skilled enough to draw a schematic but I've drawn out a complete
layout of the board with all chips and traces in an open source design
package called Fritzing. Certainly a big help with wiring up the analyser.
These drawings are the only docs I have however... One thing I'd REALLY like
is a memory map but maybe the original designer of this machine will come up
trumps soon.
Well if that does not work out the approach I would take is work
backwards from the chip select on the memory and I/O devices, things
that may throw you off are if PLDs or ROMs are used as part of the
logic. Chip select logic is usually pretty straight forward. As has
been discussed before I/O on a 8085 may be in a seperate address space
of might mapped into the I/O space. IO/-M selects between the two
address spaces.
Paul.
