> On Dec 6, 2016, at 2:56 PM, Fritz Mueller <fri...@fritzm.org> wrote:
>
>
>> On Dec 6, 2016, at 7:51 AM, Noel Chiappa <j...@mercury.lcs.mit.edu> wrote:
>>
>> [data fetch] can't be off-loaded onto a separate interface unit, as it needs
>> access to
>> register contents held in the CPU.
>
> Yeah, it’s pretty interesting! My guess would be that it was a separate
> register/command oriented interface, sitting on the Unibus, and didn’t
> actually interface directly with the 11/20 CPU? Such an interface could
> limit the instructions “fed” to the FPU to those accessing its internal
> registers, etc. But who knows? :-)
I don't know anything of a DEC product along those lines, but a college
classmate of mine (Bill Black, Lawrence Univ. class of 1975) built a floating
point coprocessor for our PDP11/20 that was a Unibus peripheral. I helped with
the software interface. The device had 4 registers, two for source and two for
second source and result. They appeared at several different bus addresses;
you'd select the operation to perform based on which address you used. The
device would start when the 4 source words had been loaded, then a read cycle
of the result register would simply be held off until the operation was done
(since it would complete well within the SSYNC timeout).
The implementation took, if I remember right, one hex-sized wire wrap board.
paul
