On 07/15/2015 01:24 PM, Noel Chiappa wrote:
Well, one would have to dig into the ALDs to be sure. But, the FEMMs have some large drawings that are essentially RTL in graphical form, and a lot of description of how it all worked. My understanding is all those registers were essentially D latches. So, they got one data input from the ALU or a mux, and a latch pulse, and provided a Q output. Each of these latches took up at least 4 SLT packages, I'm not sure exactly how many for sure. So, the whole latch was composed of something like 4 NOR gates or the equivalent, plus one inverter.> On 7/14/2015 7:36 PM, Jon Elson wrote:> On the system 360 CPUs, they did not use flip-flops like we are used > to, today. They used latches ... Since these were discrete transistor > implementations, a real flip-flop was too expensive, but a latch could > be implemented in about 6 transistors, I think. > The 11/45 used TTL ICs, so real FFs were available in that technology, > although they may have used latches as well. This confused me a bit, until I realized that you were using "latch" for what I think of as 'SR flip-flop', and "flip-flop" for 'D and JK flip-flops'. Guess that shows how long ago I did hardware... :-) To be a bit more detailed, on the 360's, were those latches 'simple' SR flops (i.e. un-gated), or were they gated?
(Sorry about being so vague, I read a bunch of IBM FEMMs about a year ago when I had some spare time.)
Jon
