Hi,
> I tested on rk3399 (Pine64 RockPro64):
>
> com0 at mainbus0: DesignWare APB UART, no fifo
> com1 at mainbus0: DesignWare APB UART, no fifo
> com1: console
>
> I could talk to the system over the serial console.
>
> Anything else to test?
Thank you for testing. I think it is okay that serial console work
without any problems. I hope other SoCs that have dw-apb based UART
(marvell?) will work...
DW_APB UART code uses CPR (offset 0xf4) register to determine FIFO depth,
but not a few devices disables this register. At least Allwinner.
According to Rockchip's TRM,
RK3168/3188
the address of CPR is described, but no details of the register.
RK3308/3328/3399
CPR looks implemented, but the value is 0x00000000.
I think consulting CPR on Rockchip results "no fifo".
Even if the value of CPR is 0x00000000, current code treat as 1byte FIFO
and FIFO enabled. Transmitter code uses FIFO depth vaue (sc->sc_fifolen)
so the performance might be limited. Receiver code simply checks RXRDY flag,
FIFO depth have no influence.
I am planning to improve the message at com_attach_subr().
for example:
com0 at mainbus0: DesignWare APB UART
com1 at mainbus0: DesignWare APB UART, 64 byte fifo
simply remove "no fifo", and display fifo size if CPR has effective value.
If there is better idea, please tell me.
Regards,
--
SASANO Takayoshi (JG1UAA) <u...@mx5.nisiq.net>
