I tied your suggested change with the following results.
Not yet what I am thinking is correct.
U-Boot SPL 2017.09-rc2 (Aug 22 2017 - 00:26:16)
DRAM: 512 MiB
Trying to boot from MMC1
U-Boot 2017.09-rc2 (Aug 22 2017 - 00:26:16 -0600) Allwinner Technology
CPU: Allwinner H3 (SUN8I 1680)
Model: Xunlong Orange Pi One
DRAM: 512 MiB
MMC: SUNXI SD/MMC: 0
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: phy interface0
eth0: ethernet@1c30000
starting USB...
USB0: USB EHCI 1.00
USB1: USB OHCI 1.0
scanning bus 0 for devices... 2 USB Device(s) found
scanning usb for storage devices... 0 Storage Device(s) found
Hit any key to stop autoboot: 0
switch to partitions #0, OK
mmc0 is current device
Scanning mmc 0:1...
reading /sun8i-h3-orangepi-one.dtb
14504 bytes read in 25 ms (566.4 KiB/s)
Found EFI removable media binary efi/boot/bootarm.efi
reading efi/boot/bootarm.efi
67356 bytes read in 36 ms (1.8 MiB/s)
## Starting EFI application at 42000000 ...
Scanning disks on usb...
Scanning disks on mmc...
MMC Device 1 not found
MMC Device 2 not found
MMC Device 3 not found
Found 5 disks
>> OpenBSD/armv7 BOOTARM 1.0
boot>
booting sd0a:/bsd: 3905464+165912+498860 [281342+90+518560+243869]=0x561424
OpenBSD/armv7 booting ...
arg0 0xc0861424 arg1 0x0 arg2 0x48000000
Allocating page tables
freestart = 0x40862000, free_pages = 128926 (0x0001f79e)
IRQ stack: p0x40890000 v0xc0890000
ABT stack: p0x40891000 v0xc0891000
UND stack: p0x40892000 v0xc0892000
SVC stack: p0x40893000 v0xc0893000
Creating L1 page table at 0x40864000
Mapping kernel
Constructing L2 page tables
undefined page pmap [ using 1044320 bytes of bsd ELF symbol table ]
board type: 0
Copyright (c) 1982, 1986, 1989, 1991, 1993
The Regents of the University of California. All rights reserved.
Copyright (c) 1995-2017 OpenBSD. All rights reserved.
https://www.OpenBSD.org
OpenBSD 6.2-beta (GENERIC) #3: Mon Aug 28 10:18:41 PDT 2017
sysad...@openbsdop1.graf.lan:/usr/src/sys/arch/armv7/compile/GENERIC
real mem = 536870912 (512MB)
avail mem = 517378048 (493MB)
mainbus0 at root: Xunlong Orange Pi One
cpu0 at mainbus0: ARM Cortex-A7 r0p5 (ARMv7)
cpu0: DC enabled IC enabled WB disabled EABT branch prediction enabled
cpu0: 32KB(32b/l,2way) I-cache, 32KB(64b/l,4way) wr-back D-cache
cortex0 at mainbus0
sxiccmu0 at mainbus0
psci0 at mainbus0
simplebus0 at mainbus0: "soc"
sxiccmu1 at simplebus0
sxipio0 at simplebus0: 94 pins
sxipio1 at simplebus0: 12 pins
sximmc0 at simplebus0
sdmmc0 at sximmc0: 4-bit, sd high-speed, mmc high-speed, dma
ehci0 at simplebus0
usb0 at ehci0: USB revision 2.0
uhub0 at usb0 configuration 1 interface 0 "Generic EHCI root hub" rev
2.00/1.00 addr 1
ehci1 at simplebus0
usb1 at ehci1: USB revision 2.0
uhub1 at usb1 configuration 1 interface 0 "Generic EHCI root hub" rev
2.00/1.00 addr 1
sxidog0 at simplebus0
com0 at simplebus0: ns16550, no working fifo
com0: console
ampintc0 at simplebus0 nirq 160, ncpu 4
sxirtc0 at simplebus0
A0 mux 7<invalid>- skipping
A1 mux 7<invalid>- skipping
A2 mux 7<invalid>- skipping
A3 mux 7<invalid>- skipping
A4 mux 2<uart0>- skipping
A5 mux 2<uart0>- skipping
A6 mux 7<invalid>- skipping
A7 mux 7<invalid>- skipping
A8 mux 7<invalid>- skipping
A9 mux 7<invalid>- skipping
A10 mux 7<invalid>- skipping
A11 mux 7<invalid>- skipping
A12 mux 7<invalid>- skipping
A13 mux 7<invalid>- skipping
A14 mux 7<invalid>- skipping
A15 mux 7<invalid>- skipping
A16 mux 7<invalid>- skipping
A17 mux 7<invalid>- skipping
A18 mux 7<invalid>- skipping
A19 mux 7<invalid>- skipping
A20 mux 7<invalid>- skipping
A21 mux 7<invalid>- skipping
C0 mux 7<invalid>- skipping
C1 mux 7<invalid>- skipping
C2 mux 7<invalid>- skipping
C3 mux 7<invalid>- skipping
C4 mux 7<invalid>- skipping
C5 mux 7<invalid>- skipping
C6 mux 7<invalid>- skipping
C7 mux 7<invalid>- skipping
C8 mux 7<invalid>- skipping
C9 mux 7<invalid>- skipping
C10 mux 7<invalid>- skipping
C11 mux 7<invalid>- skipping
C12 mux 7<invalid>- skipping
C13 mux 7<invalid>- skipping
C14 mux 7<invalid>- skipping
C15 mux 7<invalid>- skipping
C16 mux 7<invalid>- skipping
D0 mux 7<invalid>- skipping
D1 mux 7<invalid>- skipping
D2 mux 7<invalid>- skipping
D3 mux 7<invalid>- skipping
D4 mux 7<invalid>- skipping
D5 mux 7<invalid>- skipping
D6 mux 7<invalid>- skipping
D7 mux 7<invalid>- skipping
D8 mux 7<invalid>- skipping
D9 mux 7<invalid>- skipping
D10 mux 7<invalid>- skipping
D11 mux 7<invalid>- skipping
D12 mux 7<invalid>- skipping
D13 mux 7<invalid>- skipping
D14 mux 7<invalid>- skipping
D15 mux 7<invalid>- skipping
D16 mux 7<invalid>- skipping
D17 mux 7<invalid>- skipping
E0 mux 7<invalid>- skipping
E1 mux 7<invalid>- skipping
E2 mux 7<invalid>- skipping
E3 mux 7<invalid>- skipping
E4 mux 7<invalid>- skipping
E5 mux 7<invalid>- skipping
E6 mux 7<invalid>- skipping
E7 mux 7<invalid>- skipping
E8 mux 7<invalid>- skipping
E9 mux 7<invalid>- skipping
E10 mux 7<invalid>- skipping
E11 mux 7<invalid>- skipping
E12 mux 7<invalid>- skipping
E13 mux 7<invalid>- skipping
E14 mux 7<invalid>- skipping
E15 mux 7<invalid>- skipping
F0 mux 2<mmc0>- skipping
F1 mux 2<mmc0>- skipping
F2 mux 2<mmc0>- skipping
F3 mux 2<mmc0>- skipping
F4 mux 2<mmc0>- skipping
F5 mux 2<mmc0>- skipping
F6 mux 0<gpio_in>- adding
G0 mux 7<invalid>- skipping
G1 mux 7<invalid>- skipping
G2 mux 7<invalid>- skipping
G3 mux 7<invalid>- skipping
G4 mux 7<invalid>- skipping
G5 mux 7<invalid>- skipping
G6 mux 7<invalid>- skipping
G7 mux 7<invalid>- skipping
G8 mux 7<invalid>- skipping
G9 mux 7<invalid>- skipping
G10 mux 7<invalid>- skipping
G11 mux 7<invalid>- skipping
G12 mux 7<invalid>- skipping
G13 mux 7<invalid>- skipping
gpio0 at sxipio0: 32 pins
gpio1 at sxipio0: 32 pins
gpio2 at sxipio0: 32 pins
gpio3 at sxipio0: 32 pins
gpio4 at sxipio0: 32 pins
gpio5 at sxipio0: 32 pins
gpio6 at sxipio0: 32 pins
A0 mux 7<invalid>- skipping
A1 mux 7<invalid>- skipping
A2 mux 7<invalid>- skipping
A3 mux 7<invalid>- skipping
A4 mux 7<invalid>- skipping
A5 mux 7<invalid>- skipping
A6 mux 7<invalid>- skipping
A7 mux 7<invalid>- skipping
A8 mux 7<invalid>- skipping
A9 mux 7<invalid>- skipping
A10 mux 7<invalid>- skipping
A11 mux 7<invalid>- skipping
gpio7 at sxipio1: 32 pins
agtimer0 at mainbus0: tick rate 24000 KHz
scsibus0 at sdmmc0: 2 targets, initiator 0
sd0 at scsibus0 targ 1 lun 0: <SD/MMC, SL16G, 0080> SCSI2 0/direct removable
sd0: 15193MB, 512 bytes/sector, 31116288 sectors
run0 at uhub1 port 1 configuration 1 interface 0 "Ralink 802.11 n WLAN" rev
2.00/1.01 addr 2
run0: MAC/BBP RT3070 (rev 0x0201), RF RT3020 (MIMO 1T1R), address
00:1f:cf:52:86:52
vscsi0 at root
scsibus1 at vscsi0: 256 targets
softraid0 at root
scsibus2 at softraid0: 256 targets
boot device: sd0
root on sd0a (e50fea1f8609b974.a) swap on sd0b dump on sd0b
Automatic boot in progress: starting file system checks.
/dev/sd0a (e50fea1f8609b974.a): file system is clean; not checking
/dev/sd0l (e50fea1f8609b974.l): file system is clean; not checking
/dev/sd0d (e50fea1f8609b974.d): file system is clean; not checking
/dev/sd0f (e50fea1f8609b974.f): file system is clean; not checking
/dev/sd0g (e50fea1f8609b974.g): file system is clean; not checking
/dev/sd0h (e50fea1f8609b974.h): file system is clean; not checking
/dev/sd0k (e50fea1f8609b974.k): file system is clean; not checking
/dev/sd0j (e50fea1f8609b974.j): file system is clean; not checking
/dev/sd0e (e50fea1f8609b974.e): file system is clean; not checking
setting tty flags
pf enabled
starting network
DHCPREQUEST on run0 to 255.255.255.255
DHCPACK from 192.168.1.253 (cc:5d:4e:ad:f4:0f)
bound to 192.168.1.6 -- renewal in 43200 seconds.
reordering libraries: done.
starting early daemons: syslogd pflogd ntpd.
starting RPC daemons:.
savecore: no core dump
checking quotas: done.
clearing /tmp
kern.securelevel: 0 -> 1
creating runtime link editor directory cache.
preserving editor files.
starting network daemons: sshd smtpd sndiod.
starting local daemons: cron.
Mon Aug 28 10:26:12 PDT 2017
OpenBSD/armv7 (openbsdop1.graf.lan) (console)
login:
-----Original Message-----
From: owner-...@openbsd.org [mailto:owner-...@openbsd.org] On Behalf Of
Artturi Alm
Sent: Monday, August 28, 2017 7:09 AM
To: Mark Kettenis <mark.kette...@xs4all.nl>
Cc: arm@openbsd.org
Subject: Re: looking for help on gpio setup on orange pi one
On Mon, Aug 28, 2017 at 09:32:04AM +0300, Artturi Alm wrote:
> On Sat, Aug 26, 2017 at 09:29:31PM +0200, Mark Kettenis wrote:
> > > From: "Stephen Graf" <s_g...@telus.net>
> > > Date: Sat, 26 Aug 2017 11:58:58 -0700
> > >
> > > Thank you again for your suggestions. I tried to follow your
> > > example but it did not work out as expected.
> > > For some reason the gpioctl set command is not working at secure
> > > level 0 and without that it is impossible to do anything with the
device later.
> >
> > You should run the diff that Artturi send in an early mail. That
> > produces output like:
> >
>
> i'm almost overtired atm., but after comparing datasheets i decided to
> take a quick look at sxipio again, and stumbled upon these shifts.
>
> sxipio_config_pin:
> 337 mux = (config & GPIO_CONFIG_OUTPUT) ? 1 : 0;
> 338 off = (pin & 0x7) << 2;
> 339 SXICMS4(sc, SXIPIO_CFG(port, pin), 0x7 << off, mux << off);
>
> sxipio_attach_gpio:
> 460 /* Get pin configuration. */
> 461 reg = SXIREAD4(sc, SXIPIO_CFG(port, pin));
> 462 cfg = (reg >> (pin & 0x7)) & 0x7;
>
> 1:1?
> -Artturi
>
So, i was thinking something like this (untested):
diff --git a/sys/dev/fdt/sxipio.c b/sys/dev/fdt/sxipio.c index
643226ecd19..9de710ffd5c 100644
--- a/sys/dev/fdt/sxipio.c
+++ b/sys/dev/fdt/sxipio.c
@@ -446,7 +446,7 @@ sxipio_attach_gpio(struct device *parent)
uint32_t reg;
int port, pin;
int cfg, state;
- int i;
+ int i, off;
for (i = 0; i < sc->sc_npins; i++) {
/* Skip pins that have no gpio function. */ @@ -459,7 +459,8
@@ sxipio_attach_gpio(struct device *parent)
/* Get pin configuration. */
reg = SXIREAD4(sc, SXIPIO_CFG(port, pin));
- cfg = (reg >> (pin & 0x7)) & 0x7;
+ off = (pin & 0x7) << 2;
+ cfg = (reg >> off) & 0x7;
/* Skip pins that have been assigned other functions. */
if (cfg != SXIPIO_GPIO_IN && cfg != SXIPIO_GPIO_OUT)
just figured how the output below does ie. miss some supposed to be
i2c-pins.
-Artturi
>
> > > A0 mux 5<gmac>- skipping
> > > A1 mux 2<emac>- skipping
> > > A2 mux 5<gmac>- skipping
> > > A3 mux 2<emac>- skipping
> > > A4 mux 5<gmac>- skipping
> > > A5 mux 2<emac>- skipping
> > > A6 mux 5<gmac>- skipping
> > > A7 mux 2<emac>- skipping
> > > A8 mux 5<gmac>- skipping
> > > A9 mux 2<emac>- skipping
> > > A10 mux 5<gmac>- skipping
> > > A11 mux 2<emac>- skipping
> > > A12 mux 5<gmac>- skipping
> > > A13 mux 2<emac>- skipping
> > > A14 mux 5<gmac>- skipping
> > > A15 mux 2<emac>- skipping
> > > A16 mux 5<gmac>- skipping
> > > A17 mux 2<emac>- skipping
> > > B0 mux 2<i2c0>- skipping
> > > B1 mux 1<gpio_out>- adding
> > > B2 mux 0<gpio_in>- adding
> > > B3 mux 4<spdif>- skipping
> > > B4 mux 2<ir0>- skipping
> > > B5 mux 1<gpio_out>- adding
> > > B6 mux 0<gpio_in>- adding
> > > B7 mux 0<gpio_in>- adding
> > > B8 mux 1<gpio_out>- adding
> > > B9 mux 0<gpio_in>- adding
> > > B10 mux 0<gpio_in>- adding
> > > B11 mux 0<gpio_in>- adding
> > > B12 mux 0<gpio_in>- adding
> > > B13 mux 0<gpio_in>- adding
> > > B14 mux 0<gpio_in>- adding
> > > B15 mux 0<gpio_in>- adding
> > > B16 mux 0<gpio_in>- adding
> > > B17 mux 0<gpio_in>- adding
> > > B18 mux 0<gpio_in>- adding
> > > B19 mux 0<gpio_in>- adding
> > > B20 mux 0<gpio_in>- adding
> > > B21 mux 0<gpio_in>- adding
> > > B22 mux 0<gpio_in>- adding
> > > B23 mux 4<invalid>- skipping
> > > C0 mux 0<gpio_in>- adding
> > > C1 mux 0<gpio_in>- adding
> > > C2 mux 0<gpio_in>- adding
> > > C3 mux 0<gpio_in>- adding
> > > C4 mux 0<gpio_in>- adding
> > > C5 mux 0<gpio_in>- adding
> > > C6 mux 0<gpio_in>- adding
> > > C7 mux 0<gpio_in>- adding
> > > C8 mux 0<gpio_in>- adding
> > > C9 mux 0<gpio_in>- adding
> > > C10 mux 0<gpio_in>- adding
> > > C11 mux 0<gpio_in>- adding
> > > C12 mux 0<gpio_in>- adding
> > > C13 mux 0<gpio_in>- adding
> > > C14 mux 0<gpio_in>- adding
> > > C15 mux 0<gpio_in>- adding
> > > C16 mux 0<gpio_in>- adding
> > > C17 mux 0<gpio_in>- adding
> > > C18 mux 0<gpio_in>- adding
> > > C19 mux 0<gpio_in>- adding
> > > C20 mux 0<gpio_in>- adding
> > > C21 mux 0<gpio_in>- adding
> > > C22 mux 0<gpio_in>- adding
> > > C23 mux 0<gpio_in>- adding
> > > C24 mux 0<gpio_in>- adding
> > > D0 mux 0<gpio_in>- adding
> > > D1 mux 0<gpio_in>- adding
> > > D2 mux 0<gpio_in>- adding
> > > D3 mux 0<gpio_in>- adding
> > > D4 mux 0<gpio_in>- adding
> > > D5 mux 0<gpio_in>- adding
> > > D6 mux 0<gpio_in>- adding
> > > D7 mux 0<gpio_in>- adding
> > > D8 mux 0<gpio_in>- adding
> > > D9 mux 0<gpio_in>- adding
> > > D10 mux 0<gpio_in>- adding
> > > D11 mux 0<gpio_in>- adding
> > > D12 mux 0<gpio_in>- adding
> > > D13 mux 0<gpio_in>- adding
> > > D14 mux 0<gpio_in>- adding
> > > D15 mux 0<gpio_in>- adding
> > > D16 mux 0<gpio_in>- adding
> > > D17 mux 0<gpio_in>- adding
> > > D18 mux 0<gpio_in>- adding
> > > D19 mux 0<gpio_in>- adding
> > > D20 mux 0<gpio_in>- adding
> > > D21 mux 0<gpio_in>- adding
> > > D22 mux 0<gpio_in>- adding
> > > D23 mux 0<gpio_in>- adding
> > > D24 mux 0<gpio_in>- adding
> > > D25 mux 0<gpio_in>- adding
> > > D26 mux 0<gpio_in>- adding
> > > D27 mux 0<gpio_in>- adding
> > > E0 mux 0<gpio_in>- adding
> > > E1 mux 0<gpio_in>- adding
> > > E2 mux 0<gpio_in>- adding
> > > E3 mux 0<gpio_in>- adding
> > > E4 mux 0<gpio_in>- adding
> > > E5 mux 0<gpio_in>- adding
> > > E6 mux 0<gpio_in>- adding
> > > E7 mux 0<gpio_in>- adding
> > > E8 mux 0<gpio_in>- adding
> > > E9 mux 0<gpio_in>- adding
> > > E10 mux 0<gpio_in>- adding
> > > E11 mux 0<gpio_in>- adding
> > > F0 mux 2<mmc0>- skipping
> > > F1 mux 1<gpio_out>- adding
> > > F2 mux 0<gpio_in>- adding
> > > F3 mux 4<jtag>- skipping
> > > F4 mux 2<mmc0>- skipping
> > > F5 mux 1<gpio_out>- adding
> > > G0 mux 0<gpio_in>- adding
> > > G1 mux 0<gpio_in>- adding
> > > G2 mux 0<gpio_in>- adding
> > > G3 mux 0<gpio_in>- adding
> > > G4 mux 0<gpio_in>- adding
> > > G5 mux 0<gpio_in>- adding
> > > G6 mux 0<gpio_in>- adding
> > > G7 mux 0<gpio_in>- adding
> > > G8 mux 0<gpio_in>- adding
> > > G9 mux 0<gpio_in>- adding
> > > G10 mux 0<gpio_in>- adding
> > > G11 mux 0<gpio_in>- adding
> > > H0 mux 0<gpio_in>- adding
> > > H1 mux 0<gpio_in>- adding
> > > H2 mux 0<gpio_in>- adding
> > > H3 mux 0<gpio_in>- adding
> > > H4 mux 0<gpio_in>- adding
> > > H5 mux 0<gpio_in>- adding
> > > H6 mux 0<gpio_in>- adding
> > > H7 mux 0<gpio_in>- adding
> > > H8 mux 0<gpio_in>- adding
> > > H9 mux 0<gpio_in>- adding
> > > H10 mux 0<gpio_in>- adding
> > > H11 mux 0<gpio_in>- adding
> > > H12 mux 0<gpio_in>- adding
> > > H13 mux 0<gpio_in>- adding
> > > H14 mux 0<gpio_in>- adding
> > > H15 mux 0<gpio_in>- adding
> > > H16 mux 0<gpio_in>- adding
> > > H17 mux 0<gpio_in>- adding
> > > H18 mux 0<gpio_in>- adding
> > > H19 mux 0<gpio_in>- adding
> > > H20 mux 0<gpio_in>- adding
> > > H21 mux 0<gpio_in>- adding
> > > H22 mux 0<gpio_in>- adding
> > > H23 mux 0<gpio_in>- adding
> > > H24 mux 0<gpio_in>- adding
> > > H25 mux 0<gpio_in>- adding
> > > H26 mux 0<gpio_in>- adding
> > > H27 mux 0<gpio_in>- adding
> > > I0 mux 0<gpio_in>- adding
> > > I1 mux 0<gpio_in>- adding
> > > I2 mux 0<gpio_in>- adding
> > > I3 mux 0<gpio_in>- adding
> > > I4 mux 0<gpio_in>- adding
> > > I5 mux 0<gpio_in>- adding
> > > I6 mux 0<gpio_in>- adding
> > > I7 mux 0<gpio_in>- adding
> > > I8 mux 0<gpio_in>- adding
> > > I9 mux 0<gpio_in>- adding
> > > I10 mux 0<gpio_in>- adding
> > > I11 mux 0<gpio_in>- adding
> > > I12 mux 0<gpio_in>- adding
> > > I13 mux 0<gpio_in>- adding
> > > I14 mux 0<gpio_in>- adding
> > > I15 mux 0<gpio_in>- adding
> > > I16 mux 0<gpio_in>- adding
> > > I17 mux 0<gpio_in>- adding
> > > I18 mux 0<gpio_in>- adding
> > > I19 mux 0<gpio_in>- adding
> > > I20 mux 0<gpio_in>- adding
> > > I21 mux 0<gpio_in>- adding
> >
> > which allows us to see how the pins are configured and whether
> > they're made available.
