On Sat, Aug 26, 2017 at 09:29:31PM +0200, Mark Kettenis wrote:
> > From: "Stephen Graf" <s_g...@telus.net>
> > Date: Sat, 26 Aug 2017 11:58:58 -0700
> > 
> > Thank you again for your suggestions. I tried to follow your example but it
> > did not work out as expected.
> > For some reason the gpioctl set command is not working at secure level 0 and
> > without that it is impossible to do anything with the device later.
> 
> You should run the diff that Artturi send in an early mail.  That
> produces output like:
> 

i'm almost overtired atm., but after comparing datasheets i decided to
take a quick look at sxipio again, and stumbled upon these shifts.

sxipio_config_pin:
337         mux = (config & GPIO_CONFIG_OUTPUT) ? 1 : 0;
338         off = (pin & 0x7) << 2;
339         SXICMS4(sc, SXIPIO_CFG(port, pin), 0x7 << off, mux << off);

sxipio_attach_gpio:
460                 /* Get pin configuration. */
461                 reg = SXIREAD4(sc, SXIPIO_CFG(port, pin));
462                 cfg = (reg >> (pin & 0x7)) & 0x7;

1:1?
-Artturi


> > A0 mux 5<gmac>- skipping
> > A1 mux 2<emac>- skipping
> > A2 mux 5<gmac>- skipping
> > A3 mux 2<emac>- skipping
> > A4 mux 5<gmac>- skipping
> > A5 mux 2<emac>- skipping
> > A6 mux 5<gmac>- skipping
> > A7 mux 2<emac>- skipping
> > A8 mux 5<gmac>- skipping
> > A9 mux 2<emac>- skipping
> > A10 mux 5<gmac>- skipping
> > A11 mux 2<emac>- skipping
> > A12 mux 5<gmac>- skipping
> > A13 mux 2<emac>- skipping
> > A14 mux 5<gmac>- skipping
> > A15 mux 2<emac>- skipping
> > A16 mux 5<gmac>- skipping
> > A17 mux 2<emac>- skipping
> > B0 mux 2<i2c0>- skipping
> > B1 mux 1<gpio_out>- adding
> > B2 mux 0<gpio_in>- adding
> > B3 mux 4<spdif>- skipping
> > B4 mux 2<ir0>- skipping
> > B5 mux 1<gpio_out>- adding
> > B6 mux 0<gpio_in>- adding
> > B7 mux 0<gpio_in>- adding
> > B8 mux 1<gpio_out>- adding
> > B9 mux 0<gpio_in>- adding
> > B10 mux 0<gpio_in>- adding
> > B11 mux 0<gpio_in>- adding
> > B12 mux 0<gpio_in>- adding
> > B13 mux 0<gpio_in>- adding
> > B14 mux 0<gpio_in>- adding
> > B15 mux 0<gpio_in>- adding
> > B16 mux 0<gpio_in>- adding
> > B17 mux 0<gpio_in>- adding
> > B18 mux 0<gpio_in>- adding
> > B19 mux 0<gpio_in>- adding
> > B20 mux 0<gpio_in>- adding
> > B21 mux 0<gpio_in>- adding
> > B22 mux 0<gpio_in>- adding
> > B23 mux 4<invalid>- skipping
> > C0 mux 0<gpio_in>- adding
> > C1 mux 0<gpio_in>- adding
> > C2 mux 0<gpio_in>- adding
> > C3 mux 0<gpio_in>- adding
> > C4 mux 0<gpio_in>- adding
> > C5 mux 0<gpio_in>- adding
> > C6 mux 0<gpio_in>- adding
> > C7 mux 0<gpio_in>- adding
> > C8 mux 0<gpio_in>- adding
> > C9 mux 0<gpio_in>- adding
> > C10 mux 0<gpio_in>- adding
> > C11 mux 0<gpio_in>- adding
> > C12 mux 0<gpio_in>- adding
> > C13 mux 0<gpio_in>- adding
> > C14 mux 0<gpio_in>- adding
> > C15 mux 0<gpio_in>- adding
> > C16 mux 0<gpio_in>- adding
> > C17 mux 0<gpio_in>- adding
> > C18 mux 0<gpio_in>- adding
> > C19 mux 0<gpio_in>- adding
> > C20 mux 0<gpio_in>- adding
> > C21 mux 0<gpio_in>- adding
> > C22 mux 0<gpio_in>- adding
> > C23 mux 0<gpio_in>- adding
> > C24 mux 0<gpio_in>- adding
> > D0 mux 0<gpio_in>- adding
> > D1 mux 0<gpio_in>- adding
> > D2 mux 0<gpio_in>- adding
> > D3 mux 0<gpio_in>- adding
> > D4 mux 0<gpio_in>- adding
> > D5 mux 0<gpio_in>- adding
> > D6 mux 0<gpio_in>- adding
> > D7 mux 0<gpio_in>- adding
> > D8 mux 0<gpio_in>- adding
> > D9 mux 0<gpio_in>- adding
> > D10 mux 0<gpio_in>- adding
> > D11 mux 0<gpio_in>- adding
> > D12 mux 0<gpio_in>- adding
> > D13 mux 0<gpio_in>- adding
> > D14 mux 0<gpio_in>- adding
> > D15 mux 0<gpio_in>- adding
> > D16 mux 0<gpio_in>- adding
> > D17 mux 0<gpio_in>- adding
> > D18 mux 0<gpio_in>- adding
> > D19 mux 0<gpio_in>- adding
> > D20 mux 0<gpio_in>- adding
> > D21 mux 0<gpio_in>- adding
> > D22 mux 0<gpio_in>- adding
> > D23 mux 0<gpio_in>- adding
> > D24 mux 0<gpio_in>- adding
> > D25 mux 0<gpio_in>- adding
> > D26 mux 0<gpio_in>- adding
> > D27 mux 0<gpio_in>- adding
> > E0 mux 0<gpio_in>- adding
> > E1 mux 0<gpio_in>- adding
> > E2 mux 0<gpio_in>- adding
> > E3 mux 0<gpio_in>- adding
> > E4 mux 0<gpio_in>- adding
> > E5 mux 0<gpio_in>- adding
> > E6 mux 0<gpio_in>- adding
> > E7 mux 0<gpio_in>- adding
> > E8 mux 0<gpio_in>- adding
> > E9 mux 0<gpio_in>- adding
> > E10 mux 0<gpio_in>- adding
> > E11 mux 0<gpio_in>- adding
> > F0 mux 2<mmc0>- skipping
> > F1 mux 1<gpio_out>- adding
> > F2 mux 0<gpio_in>- adding
> > F3 mux 4<jtag>- skipping
> > F4 mux 2<mmc0>- skipping
> > F5 mux 1<gpio_out>- adding
> > G0 mux 0<gpio_in>- adding
> > G1 mux 0<gpio_in>- adding
> > G2 mux 0<gpio_in>- adding
> > G3 mux 0<gpio_in>- adding
> > G4 mux 0<gpio_in>- adding
> > G5 mux 0<gpio_in>- adding
> > G6 mux 0<gpio_in>- adding
> > G7 mux 0<gpio_in>- adding
> > G8 mux 0<gpio_in>- adding
> > G9 mux 0<gpio_in>- adding
> > G10 mux 0<gpio_in>- adding
> > G11 mux 0<gpio_in>- adding
> > H0 mux 0<gpio_in>- adding
> > H1 mux 0<gpio_in>- adding
> > H2 mux 0<gpio_in>- adding
> > H3 mux 0<gpio_in>- adding
> > H4 mux 0<gpio_in>- adding
> > H5 mux 0<gpio_in>- adding
> > H6 mux 0<gpio_in>- adding
> > H7 mux 0<gpio_in>- adding
> > H8 mux 0<gpio_in>- adding
> > H9 mux 0<gpio_in>- adding
> > H10 mux 0<gpio_in>- adding
> > H11 mux 0<gpio_in>- adding
> > H12 mux 0<gpio_in>- adding
> > H13 mux 0<gpio_in>- adding
> > H14 mux 0<gpio_in>- adding
> > H15 mux 0<gpio_in>- adding
> > H16 mux 0<gpio_in>- adding
> > H17 mux 0<gpio_in>- adding
> > H18 mux 0<gpio_in>- adding
> > H19 mux 0<gpio_in>- adding
> > H20 mux 0<gpio_in>- adding
> > H21 mux 0<gpio_in>- adding
> > H22 mux 0<gpio_in>- adding
> > H23 mux 0<gpio_in>- adding
> > H24 mux 0<gpio_in>- adding
> > H25 mux 0<gpio_in>- adding
> > H26 mux 0<gpio_in>- adding
> > H27 mux 0<gpio_in>- adding
> > I0 mux 0<gpio_in>- adding
> > I1 mux 0<gpio_in>- adding
> > I2 mux 0<gpio_in>- adding
> > I3 mux 0<gpio_in>- adding
> > I4 mux 0<gpio_in>- adding
> > I5 mux 0<gpio_in>- adding
> > I6 mux 0<gpio_in>- adding
> > I7 mux 0<gpio_in>- adding
> > I8 mux 0<gpio_in>- adding
> > I9 mux 0<gpio_in>- adding
> > I10 mux 0<gpio_in>- adding
> > I11 mux 0<gpio_in>- adding
> > I12 mux 0<gpio_in>- adding
> > I13 mux 0<gpio_in>- adding
> > I14 mux 0<gpio_in>- adding
> > I15 mux 0<gpio_in>- adding
> > I16 mux 0<gpio_in>- adding
> > I17 mux 0<gpio_in>- adding
> > I18 mux 0<gpio_in>- adding
> > I19 mux 0<gpio_in>- adding
> > I20 mux 0<gpio_in>- adding
> > I21 mux 0<gpio_in>- adding
> 
> which allows us to see how the pins are configured and whether they're
> made available.

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