On 17/06/2025 16:31, Hari Limaye wrote:
Hi Ayan,
Hi Hari,
+/*
+ * Armv8-R supports direct access and indirect access to the MPU regions
through
+ * registers:
+ * - indirect access involves changing the MPU region selector, issuing an isb
+ * barrier and accessing the selected region through specific registers
+ * - direct access involves accessing specific registers that point to
+ * specific MPU regions, without changing the selector, avoiding the use of
+ * a barrier.
+ * For Arm32 the HPR{B,L}AR<n> (for n=0..31) are used for direct access to the
+ * first 32 MPU regions.
+ * For MPU region numbered 32..254, one need to set the region number in
HPRSELR,
+ * followed by configuring HPR{B,L}AR.
+ */
+static void prepare_selector(uint8_t *sel)
NIT: s/one need/one needs/
NIT: s/MPU region numbered/MPU regions numbered/
Ack.
Also - it's not clear to me what is meant by "followed by configuring
HPR{B,L}AR";
if I understand correctly, once we have set the region number in HPRSELR
and issued an isb we can simply read/write HPR{B,L}AR as indicated in
the bullet point above?
yes, this is correct.
On Tue, Jun 17, 2025 at 12:12:51PM +0000, Ayan Kumar Halder wrote:
Define prepare_selector(), read_protection_region() and
write_protection_region() for arm32. Also, define
GENERATE_{READ/WRITE}_PR_REG_OTHERS to access MPU regions from 32 to 254.
Enable pr_{get/set}_{base/limit}(), region_is_valid() for arm32.
Enable pr_of_addr() for arm32.
The maximum number of regions supported is 255 (which corresponds to the
maximum value in HMPUIR).
Signed-off-by: Ayan Kumar Halder <ayan.kumar.hal...@amd.com>
Reviewed-by: Luca Fancellu <luca.fance...@arm.com>
---
Apart from the above, all LGTM! I've tested compilation for both 64-bit
and 32-bit and all is building successfully.
Reviewed-by: Hari Limaye <hari.lim...@arm.com>
Tested-by: Hari Limaye <hari.lim...@arm.com>
- Ayan
