Hi Roger, > On Oct 17, 2023, at 21:09, Roger Pau Monne <[email protected]> wrote: > > SAGAW is a bitmap field, with bits 1 and 2 signaling support for AGAW 1 and > AGAW 2 respectively. According to the Intel VT-d specification, an IOMMU > might > support multiple AGAW values. > > The AGAW value for each device is set in the device context entry, however > there's a caveat related to the value the field supports depending on the > translation type: > > "When the Translation-type (T) field indicates pass-through (010b) or > guest-mode (100b or 101b), this field must be programmed to indicate the > largest AGAW value supported by hardware." > > Of the translation types listed above Xen only uses pass-through (010b), and > hence we need to make sure the context entry AGAW field is set appropriately, > or else the IOMMU will report invalid context entry errors. > > To do so calculate the IOMMU supported page table levels based on the last bit > set in the SAGAW field, instead of the first one. This also allows making use > of the widest address width supported by the IOMMU, in case multiple AGAWs are > supported. > > Note that 859d11b27912 claims to replace the open-coded find_first_set_bit(), > but it's actually replacing an open coded implementation to find the last set > bit. > > Fixes: 859d11b27912 ('VT-d: prune SAGAW recognition') > Signed-off-by: Roger Pau Monné <[email protected]>
Release-acked-by: Henry Wang <[email protected]> Kind regards, Henry
