>>> On 15.01.18 at 19:12, <luwei.k...@intel.com> wrote: > Luwei Kang (7): > x86: add a flag to enable Intel processor trace > x86: configure vmcs for Intel processor trace virtualization > x86: add intel proecessor trace support for cpuid > x86: add intel processor trace context > x86: Implement Intel Processor Trace context switch > x86: Implement Intel Processor Trace MSRs read/write > x86: Disable Intel Processor Trace when VMXON in L1 guest
How can this be a re-send of v1 when the original v1 consisted of just 6 patches? Jan _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel
