>>> On 24.01.17 at 17:30, <andrew.coop...@citrix.com> wrote: > The entirety of edx is reserved. > > Intel only defines the lower 16 bits of eax, although ebx is covered by the > featureset ABI, so left unclobbered. > > AMD uses 24 bits in eax, although nothing thus far has ever exposed a non-zero > guest maxphysaddr to HVM guests. Its semantics are not clearly expressed, so > it is explicitly clobbered. ecx contains some reserved bits, and several > pieces of static topology information, which are left as the toolstack > chooses. > > A side effect of the common recalculation of maxlinaddr is that 32bit PV > guests see a maximum linear address of 32, which is consistent with the hiding > of other long mode information from them. > > Finally, the call to guest_cpuid() in mtrr_var_range_msr_set() (introduced in > c/s fff8160a) can be dropped, now that maxphysaddr can be read straight out of > the cpuid_policy block. > > Signed-off-by: Andrew Cooper <andrew.coop...@citrix.com>
Reviewed-by: Jan Beulich <jbeul...@suse.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org https://lists.xen.org/xen-devel
