On 24/01/17 15:05, Jan Beulich wrote: >>>> On 24.01.17 at 15:48, <andrew.coop...@citrix.com> wrote: >> On 24/01/17 11:59, Jan Beulich wrote: >>>>>> On 23.01.17 at 15:39, <andrew.coop...@citrix.com> wrote: >>>> Intel reserves all of this information other than the L2 cache information, >>>> and the ITSC bit from the power management leaf. >>>> >>>> AMD passes all of the cache/TLB information through to the guest, while >>>> most >>>> of of the power management information is explicitly clobbered by the >>>> toolstack. >>> Both of these look to not be fully in line with ... >>> >>>> --- a/xen/arch/x86/cpuid.c >>>> +++ b/xen/arch/x86/cpuid.c >>>> @@ -167,6 +167,9 @@ static void recalculate_misc(struct cpuid_policy *p) >>>> >>>> p->extd.e1d &= ~CPUID_COMMON_1D_FEATURES; >>>> >>>> + /* Most of Power/RAS hidden from guests. */ >>>> + p->extd.raw[0x7].a = p->extd.raw[0x7].b = p->extd.raw[0x7].c = 0; >>> ... you leaving .d completely untouched. Can you clarify this please? >> e7d is covered by the featureset bitmap, because it contains the ITSC >> feature. >> >> It is therefore covered by the main body of recalculate_domain_policy(). > Oh, of course. > > Reviewed-by: Jan Beulich <jbeul...@suse.com>
Thanks. I will tweak the commit message to make this clearer. ~Andrew _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org https://lists.xen.org/xen-devel
