>>> On 12.12.16 at 07:51, <luwei.k...@intel.com> wrote: > By the way, I think another place may need to do some modify as well. > > @@ -868,7 +868,7 @@ static int core2_vpmu_do_interrupt(struct cpu_user_regs > *regs) > if ( is_pmc_quirk ) > handle_pmc_quirk(msr_content); > core2_vpmu_cxt->global_status |= msr_content; > - msr_content = ~global_ovf_ctrl_mask; > + msr_content &= ~global_ovf_ctrl_mask; > wrmsrl(MSR_CORE_PERF_GLOBAL_OVF_CTRL, msr_content); > } > > If one counter have overflow all the bit will be clean. I think it need add & > with current status. > > Hi jan and Andrew, > What is your opinion?
I agree, but it looks to be an independent change. Jan _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org https://lists.xen.org/xen-devel
