Hi Konrad,
On 21/09/16 18:32, Konrad Rzeszutek Wilk wrote:
This is similar to commit fb9d877a9c0f3d4d15db8f6e0c5506ea641862c6
"xen/arm64: Add an helper to invalidate all instruction caches"
except it is on ARM32 side.
When we are flushing the cache we are most likley also want
s/likley/likely/
to flush the branch predictor too. Hence we add this.
And we also need to follow this with dsb()/isb() which are
memory barriers().
Signed-off-by: Konrad Rzeszutek Wilk <konrad.w...@oracle.com>
Reviewed-by: Julien Grall <julien.gr...@arm.com>
Regards,
--
Julien Grall
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