Hi Konrad, On 21/09/16 18:32, Konrad Rzeszutek Wilk wrote:
The current byte sequence is '0xcc' which makes sense on x86, but on ARM it is:cccccccc stclgt 12, cr12, [ip], {204} ; 0xcc Picking something more ARM applicable such as: efefefef svc 0x00efefef Creates a nice crash if one executes that code: (XEN) CPU1: Unexpected Trap: Supervisor Call But unfortunately that may not be a good choice either as in the future we may want to implement support for it. Julien suggested that we use a 4-byte insn instruction instead of trying to work with one byte. To make sure nothing goes bad we also require that the __init_[begin|end] be aligned properly. As such on ARM 32 we use the udf instruction (see A8.8.247 in ARM DDI 0406C.c) and on ARM 64 use the AARCH64_BREAK_FAULT instruction (aka brk instruction). We don't have to worry about Thumb code so this instruction is a safe to execute. Signed-off-by: Konrad Rzeszutek Wilk <konrad.w...@oracle.com>
Reviewed-by: Julien Grall <julien.gr...@arm.com> Regards, -- Julien Grall _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org https://lists.xen.org/xen-devel
