On Tue, Apr 12, 2016 at 09:00:42AM +0800, Shannon Zhao wrote:
> 
> 
> On 2016/4/11 22:07, Konrad Rzeszutek Wilk wrote:
> > On Mon, Apr 11, 2016 at 02:33:33PM +0100, Julien Grall wrote:
> >> The SPCR does not specify if the interrupt is edge or level triggered.
> >> So the configuration needs to be hardcoded in the code.
> >>
> >> Based on the PL011 TRM (see 2.2.8 in ARM DDI 0183G), the interrupt 
> >> generated
> >> will be active high. Whilst the wording may be interpreted differently,
> >> the SBSA (section 4.3.2 in ARM-DEN-0029 v2.3) states the PL011 is
> >> implemented with a level triggered interrupt.
> >>
> >> So the driver should configure the interrupt as high level triggered.
> >>
> >> Signed-off-by: Julien Grall <julien.gr...@arm.com>
> > 
> > Shannon, Stefano,
> > 
> > Please reply whether you are OK with this patch. Thanks!
> 
> Reviewed-by: Shannon Zhao <shannon.z...@linaro.org>

Thanks. applied.

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