The SPCR does not specify if the interrupt is edge or level triggered.
So the configuration needs to be hardcoded in the code.
Based on the PL011 TRM (see 2.2.8 in ARM DDI 0183G), the interrupt generated
will be active high. Whilst the wording may be interpreted differently,
the SBSA (section 4.3.2 in ARM-DEN-0029 v2.3) states the PL011 is
implemented with a level triggered interrupt.
So the driver should configure the interrupt as high level triggered.
Signed-off-by: Julien Grall <julien.gr...@arm.com>
---
Changes in v2:
- Update the commit message
- Effictively configure the interrupt high level triggered
---
xen/drivers/char/pl011.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/xen/drivers/char/pl011.c b/xen/drivers/char/pl011.c
index fa22edf..1212d5c 100644
--- a/xen/drivers/char/pl011.c
+++ b/xen/drivers/char/pl011.c
@@ -327,7 +327,7 @@ static int __init pl011_acpi_uart_init(const void *data)
}
/* trigger/polarity information is not available in spcr */
- irq_set_type(spcr->interrupt, IRQ_TYPE_EDGE_BOTH);
+ irq_set_type(spcr->interrupt, IRQ_TYPE_LEVEL_HIGH);
res = pl011_uart_init(spcr->interrupt, spcr->serial_port.address,
PAGE_SIZE);
--
1.9.1
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