On 01/06/15 13:11, Julien Grall wrote:
On 01/06/15 12:25, Zoltan Kiss wrote:
Hi,
Yes, we managed to test it, and it works. Then only thing I've found is
this bit:
+ /* Only 1020 interrupts are supported */
+ gicv2_info.nr_lines = min(1020U, nr_lines);
This interrupt controller only supports 511, so 1020 should be replaced.
We had such checking in the code in the early versions, and I looked
everywhere in the archives to figure out why it was dropped before
upstreaming, but I couldn't find it.
I'm aware of the 512 limit (see comment on the patch [1]). This change
was introduced on GICv2/GICv3 because the nr_lines will always be
aligned to 32, although IRQ 1020-1023 are reserved.
512 is a multiple of 32 and unless you have reserved IRQ below 512
and/or your GIC doesn't expose the right number of IRQ, this doesn't
harm and keep the change limited.
Other than this bit:
Reviewed-by: Zoltan Kiss <zoltan.k...@huawei.com>
Tested-by: Shameerali Kolothum Thodi <shameerali.kolothum.th...@huawei.com>
Thanks. Can I get some Acked/Review on the other pending patch series?
http://lists.xenproject.org/archives/html/xen-devel/2015-05/msg00944.html :
6 patches to ack.
Sure. Btw. do you have them in a public repo somewhere? It would make it
a little bit easier to apply and test.
Regards,
[1] https://patches.linaro.org/46100/
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