On 20/03/2015 01:22, Edgar E. Iglesias wrote:
Hi Julien,
Hello Edgar,
The partial device-tree support is nice and very flexible. I couldn't help
thinking that it would be nice to be able to describe more of the
guest with device-trees. It may be controversial but it would be cool
to be able to go:
xl create my-guest.dtb
While it would be feasible to move some part of the IRQ/MMIO pass-thru
in the device tree, there is some configuration options (such as the
vif, the kernel...) that can't be easily be described in the
configuration file.
A more down-to earth thing I ran into is that on the ZynqMP, the Cortex-A53
is setup to have 40 bits physical addresses. Our SMMU announces support
for up to 48bit input addresses (but can be configured for 40bits
aswell).
When XEN sets up passthrough for a dev, it probes the SMMU for the
max input address size and uses that as the input size for the
context. But because XEN reuses the page tables from p2m for the
SMMU, we end up in a miss-match.
I haven't looked at the details of how to fix but my gut feeling
is that we should be re-using the input size of the stage 2
page-tables as the input-size for the SMMU.
And only use the max input size of the SMMU to assert that it
is big enough. I may be missing something though.
The code in question is at the end of arm_smmu_device_cfg_probe(),
already merged.
You are right, we should take into account the size of the CPU physical
address.
Re-using the input size of the stage 2 page-tables seems the best solution.
Although, if I'm not mistaken, I have the inverse problem on one of our
board. I.e the input-size of the SMMU is too small. I need to double check.
Regards,
--
Julien Grall
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