>>> On 10.11.17 at 10:36, <yang.zh...@intel.com> wrote: > Yang Zhong (4): > x86/cpuid: Enable new SSE/AVX/AVX512 cpu features
The ordering is wrong - as said before, these ... > x86emul: Support GFNI insns > x86emul: Support vpclmulqdq > x86emul: Support vaes insns ... are supposed to be prereqs of the actual enabling of the CPUID bits. Jan _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org https://lists.xen.org/xen-devel
