On 09/15/2017 12:09 PM, Wei Liu wrote:
On Fri, Sep 15, 2017 at 11:48:40AM +0100, Julien Grall wrote:
Hi Wei,
On 09/15/2017 10:42 AM, Wei Liu wrote:
diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h
index 6203dc59f4..977e75b1d2 100644
--- a/xen/include/asm-arm/gic.h
+++ b/xen/include/asm-arm/gic.h
@@ -345,7 +345,7 @@ struct gic_hw_operations {
void (*update_lr)(int lr, const struct pending_irq *pending_irq,
unsigned int state);
/* Update HCR status register */
- void (*update_hcr_status)(uint32_t flag, bool_t set);
+ void (*update_hcr_status)(uint32_t flag, bool set);
The callers of update_hcr_status are still using 1/0 (see arch/arm/gic.c).
Would you mind to fix it?
I will squash in the following diff:
With that:
Reviewed-by: Julien Grall <julien.gr...@arm.com>
Cheers,
diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c
index 6c803bf09b..f578f3c566 100644
--- a/xen/arch/arm/gic.c
+++ b/xen/arch/arm/gic.c
@@ -606,7 +606,7 @@ void gic_clear_lrs(struct vcpu *v)
if ( is_idle_vcpu(v) )
return;
- gic_hw_ops->update_hcr_status(GICH_HCR_UIE, 0);
+ gic_hw_ops->update_hcr_status(GICH_HCR_UIE, false);
spin_lock_irqsave(&v->arch.vgic.lock, flags);
@@ -731,7 +731,7 @@ void gic_inject(void)
gic_restore_pending_irqs(current);
if ( !list_empty(¤t->arch.vgic.lr_pending) && lr_all_full() )
- gic_hw_ops->update_hcr_status(GICH_HCR_UIE, 1);
+ gic_hw_ops->update_hcr_status(GICH_HCR_UIE, true);
}
--
Julien Grall
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