>>> On 12.04.17 at 12:58, <andrew.coop...@citrix.com> wrote:
> On 12/04/17 09:57, Jan Beulich wrote:
>>>>> On 12.04.17 at 02:04, <chao....@intel.com> wrote:
>>> --- a/xen/drivers/passthrough/vtd/intremap.c
>>> +++ b/xen/drivers/passthrough/vtd/intremap.c
>>> @@ -200,8 +200,9 @@ static void update_irte(struct iommu *iommu, struct
>>> iremap_entry *entry,
>>> else
>>> {
>>> /*
>>> - * If the caller requests an atomic update but we can't meet it,
>>> - * a bug will be raised.
>>> + * VT-d hardware doesn't update IRTEs behind us, nor the software.
>> Hmm, so far I was under the impression that in posted mode the
>> IRTE could be updated by hardware. Is that not the case?
>
> No. The IRTE is just a translation structure, so conceptually similar
> to a pagetable.
Not the best analogy, as page tables do get written by the CPU.
> With posted interrupts, it is the PI block in memory (referenced by the
> IRTE) which gets written to by hardware.
Okay, then I apparently misremember Feng saying otherwise in
the early stages of the original series.
Jan
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