>>> On 28.11.14 at 11:29, <liang.z...@intel.com> wrote: >> > - if (!hvm_pse1gb_supported(d)) >>> + if (!hvm_pse1gb_supported(d) || paging_mode_shadow(d)) >>> *edx &= ~cpufeat_mask(X86_FEATURE_PAGE1GB); >> >>With >> >>#define hvm_pse1gb_supported(d) \ >> (cpu_has_page1gb && paging_mode_hap(d)) > >>the change above is pointless. While, considering this, comments on >>v2 may have been misleading, you should have simply updated the patch > description instead to clarify why the v2 change was okay even for the shadow > mode case. > > I checked the code and found that for a normal guest can only be in hap mode > or shadow mode before I sending the patch, but I am not share if it's true > for dom0.
The CPUID code in libxc doesn't apply to Dom0 at all, and CPUID handling is also special cased in the hypervisor for Dom0. Plus finally Dom0 only possibly being PV or PVH, PVH requiring HAP and PV generally not allowing large pages anyway, your concern is unnecessary. Jan _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel
