As everyone knows by now, the Skylake refresh, Kaby Lake, was released a few days ago as the new 7th gen Core Processors. This includes the Union Point Chipsets (200 Series) for LGA 1151, which are the B250, Q250, Q270, H270, Z270, and possibily at least one more Chipset for Xeons E3 1200v6, which is rumored to be the C422 according to available info (It was not officially released as far that I know, nor the Xeons E3 1200v6).
If I recall correctly, when the Skylake platform was first released, there was something broken in the Sunrise Point Chipsets related to PCIe ACS support, thus the IOMMU Grouping of the Chipset integrated Devices and its PCIe Slots was extremely ugly. A quirk for that was included in the Linux Kernel, and everyone was happy. But with the new Chipsets, it seems that we will need new quirks... According to the 200 Series Chipset Family PCH Spec Update, here: <http://www.intel.com/content/www/us/en/chipsets/200-series-chipset-pch-datasheet-vol-1.html>http://www.intel.com/content/www/us/en/chipsets/200-series-chipset-pch-spec-update.html They have the Errata 22, which is that PCIe ACS is at a different offset than expected. This looks to be the very same Errata 23 than the previous Skylake Sunrise Point Chipsets had, which I suppose that is what got fixed last time: http://www.intel.la/content/www/xl/es/chipsets/100-series-chipset-spec-update.html Basically, the new Motherboards with Union Point Chipsets should have broken IOMMU Grouping in the same fashion as Sunrise Point, but should be fixeable. So, I'm sending this to be one step ahead of the Kaby Lake early adopters that will for sure eventually report this :D BTW, I found comments here: https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/drivers/pci/quirks.c ...stating than the previous Intel Chipsets (For Haswell, Haswell-E and previous generations) don't support PCIe ACS, instead it is "ACS-like". What is the difference? Reading more comments, It seems that there are several issues with a few AMD and Intel Chipsets that don't support the PCIe ACS specifications to the letter, but instead a subset of it or something with equivalent functionality, that is at least enough to provide the expected isolation for Passthrough, and thus the groupings. Is that correct?
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