If you only need very simple downsampling/decimation, I think i saw a [keep-one-in-n rfnoc block in the repo](https://github.com/EttusResearch/uhd/tree/master/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_keep_one_in_n) that only keeps every n-th sample. You might be able to use it, or at least use it as a starting point together with some simple post processing. \ It seems like an older block and I have never used it myself so I have no idea if its fully functional on x300, but it probably has a smaller fpga footprint compared to the full ddc block and maybe you can at least use it to get some ideas.
Regards, Niels\ \ Brian Padalino wrote: > On Tue, May 13, 2025 at 10:55 AM sp > [stackprogra...@gmail.com](mailto:stackprogra...@gmail.com) wrote: > > > Thanks for giving useful information. Reason for i want to remove ddc in > > my FPGA image core, Really I have a USRP X300, I want to add a custom RFNOC > > block that it needs very much resources such a BRAM or others on FPGA USRP > > X300. I emphasize I don't afford to buy a new USRP x310 or X400. So I have > > to write more optimized code! > > Understood. You can then remove the DUC or DDC from the design and > implement your own very efficient DUC or DDC in your own block. Just make > sure the interpolation or decimation rate is exactly what you need. For the > X300 it's 200 Msps you're targeting. > > Good luck. > > Brian > > >
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