Hello everyone,
As part of a research project, I'm looking to implement an OFDM receiver
on the FPGA of a USRPx310 (and more specifically, the synchronisation
stage). According to my research, some RFNoC blocks with this function
already perform this function. Where can I find them?
If you are not aware of the existence of these blocks, I imagine the
best thing to do is to develop a new OOT module implementing this
functionality. Where can I find the documentation for creating a new
block (in UHD 4.8) ? In the RFNoC specifications? (I've already
installed UHD4.8, Vivado, ModelSim and run the Gain module's test-bench
successfully, created a new module with 'rfnoc_modtool', but I am a bit
lost about how to design my <block>.yml file, and then, wich signal to
drive in the SystemVerilog user logic code). I'm also wondering where I
can find the documentation for the available IPs to integrate in a new
design ?
Thanks for your help,
Quentin
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