If the control FIFO is full and is not getting cleared in time, the software will eventually throw an op_timeout. (Originating here: https://github.com/EttusResearch/uhd/blob/master/host/lib/rfnoc/ctrlport_endpoint.cpp#L458-L468 ).
--M On Thu, Feb 13, 2025 at 9:16 PM <[email protected]> wrote: > Hi Martin > > Thank your for your reply. > > This is a software question, related to register peek and poke. For > example, if a register read (via ctrlport_endpoint_impl::peek32) is > performed, is there a chance that the software can block (or get stuck)? > > Note: I am using UHD-4.7 > > kind regards, > > Marino > > > > > _______________________________________________ > USRP-users mailing list -- [email protected] > To unsubscribe send an email to [email protected] >
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