Interesting. I would have expected approximately 125K packets could be
stored in this FIFO given that it is 1GB and the packet size is perhaps
8000 bytes. The DRAM memory is equally divided up in order to support
multiple channels with a FIFO for each channel.  This memory allocation
algorithm is based on  the number of replay blocks and ports, but I don't
know if it matters only how many ports the replay block has available or
how many ports are in use in the current graph.  In any case, since your
experimental results are no where close to 125K packets, I wonder if there
is a different bottleneck such as the packet context FIFO.  If so, then a
rebuild of the X310 image with bigger context FIFOs would support much
larger buffering.
Rob

On Tue, Jan 14, 2025 at 8:57 PM <cjohn...@serranosystems.com> wrote:

> Thank you both!
>
>
> This allows me to buffer ~100 packets of 1996 samples instead of 65.
>
> For others:
> stream_args.args["streamer"] = "replay_buffered"; // Add more "elasticity"
> on Tx using the Replay block as FIFO in USRP
>
>
> _______________________________________________
> USRP-users mailing list -- usrp-users@lists.ettus.com
> To unsubscribe send an email to usrp-users-le...@lists.ettus.com
>
_______________________________________________
USRP-users mailing list -- usrp-users@lists.ettus.com
To unsubscribe send an email to usrp-users-le...@lists.ettus.com

Reply via email to