Hi Nidhi,
In the YML file you have the same clock input on the FFT block driven from
three sources.
- { srcblk: _device_, srcport: ce, dstblk: fft0, dstport: ce }
- { srcblk: _device_, srcport: rfnoc_chdr, dstblk: fft0, dstport: ce }
- { srcblk: _device_, srcport: radio, dstblk: fft0, dstport: ce }
You should only have one clock driving it. Most likely you want the first
one (i.e., use the ce clock to drive the ce input of the FFT).
Wade
On Mon, Oct 14, 2024 at 7:46 AM Nidhi Panda <nidhi.pa...@cyronics.com>
wrote:
> Hello,
>
> I am having USRP X300 device with following tool versions:
>
> Vivado 2021.1 - AR76780n,
> GNU radio version - v3.11.0.0git-820-g2adbd4ea
> UHD version - UHD_4.7.0.0-84-gbdada1ed
>
> By using the *"**https://kb.ettus.com/Getting_Started_with_RFNoC_in_UHD_4.0
> <https://kb.ettus.com/Getting_Started_with_RFNoC_in_UHD_4.0>**"* guide, I
> am trying to add FFT IP in my design. THis gives following error:
>
> Starting DRC Task
> INFO: [DRC 23-27] Running DRC with 8 threads
> ERROR: [DRC MDRV-1] Multiple Driver Nets: Net bus_clk_gen/inst/CLK_OUT4
> has multiple drivers: bus_clk_gen/inst/clkout1_buf/O,
> bus_clk_gen/inst/clkout4_buf/O, and radio_clk_gen/inst/clkout1_buf/O.
> INFO: [Project 1-461] DRC finished with 1 Errors
>
>
> I have attached a .yml script file for your reference. Please guide me
> with the process of adding RFNoC blocks..
>
> Regards,
> NIdhi
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