Thank you Martin for always providing a quick response! The two files I noted above, are pointed to in this Ettus docuement:
https://kb.ettus.com/Getting_Started_with_RFNoC_Development, and are specific to the e310. and do exactly what I need, and since they were ettus provided, Im assuming they fit (?)…. and have the memory settings to fit on the device. I have now modifed the [e310_rfnoc_image_core.yml](https://github.com/EttusResearch/uhd/blob/master/fpga/usrp3/top/e31x/e310_rfnoc_image_core.yml "e310_rfnoc_image_core.yml"), and am compiling it. The original ettus provided files would show me how the memory was allocated which is key on the 310 FPGA for size. We are currently using the UHD 3.14 based fosphor application witn an additional block to identify and characterize noise in a power ditribution system. I had intended to update the system to UHD 4.0 and the new RFNOC architecture.
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