Hi Marcus, Thank you for your reply. I've looked into this some more and here is what I think I know about the db_gpio and rx_data and which modules they are routed to. They are both obviously found in the x300_core.
*db_gpio_pins:* *x300_core --> db_control (x300_core submod) --> gp_atr (db_control submod)* *rx_data:* *x300_core --> fe_core (x300_core submod) --> bus_int (x300_core submod) --> rfnoc_image_core (bus_int submod) --> rfnoc_radio (rfnoc_image_core submod) --> rfnoc_ddc (rfnoc_image_core submod)* I calculate I have two options here. Both rely on getting db_gpio_pins to bus_int, which I've already done. 1. Switch the db_gpio_pins to the rx_data within bus_int. I believe this would require a setting_reg block in bus_int that would control whether the rx_data or db_gpio_pins are connected to the rfnoc_image_core radio_rx_data inputs. It could be controlled via the uhd cpp API with proper modifications. 2. Create and rfnoc block that with a static connection with 2 inputs and 1 output to the SEP. The 2 inputs would be: (1) rx_data at the output of the DDC rfnoc block and (2) db_gpio_pins that would be at the input to the rfnoc_image_core. Because x310_rfnoc_image_core.v is generated from YAML files, I'd have to figure out which YAML need to be modified to create db_gpio_pins at the input when rfnoc_image_builder is executed. This switching would be controlled from ctrlport I think. Would need more research on this. Option 1 would be outside rfnoc while option 2 is inside. Thanks, Mark On Mon, Jan 29, 2024 at 7:17 AM Marcus Müller <marcus.muel...@ettus.com> wrote: > Hello Mark, > > I'm afraid there isn't a straightforward way of doing that; can't really > think of a way > that would enable that short of inventing another "radio block"-style > RFNoC core that > handles these GPIOs as separate channels; and that would be a pretty big > endeavour. > > Best, > Marcus > > On 17.01.24 22:27, mgan...@gmail.com wrote: > > > > Greetings, > > > > With the UHD 4.x and the radio being a block in the RFNOC, is there a > way to write the > > signals input to the GPIO pins of a BasicRX daughterboard to the > Ethernet payload? I > > understand they can be used to control the radio, but I’d like to see > their state in an > > output binary stream (such as chA.dat) on a host machine. > > > > In UHD 3.9, our FPGA source was modified to accomplish this. That source > was > > significantly different as it appears to pre-date the RFNOC. The > gpio_atr module was a > > submodule instantiated under the radio module all inside the x300_core. > But now it > > appears the gpio_atr instantiation is outside of the rfnoc_radio_block > instance. > > > > Thank you, > > > > Mark Gannet > > > > > > _______________________________________________ > > USRP-users mailing list -- usrp-users@lists.ettus.com > > To unsubscribe send an email to usrp-users-le...@lists.ettus.com > _______________________________________________ > USRP-users mailing list -- usrp-users@lists.ettus.com > To unsubscribe send an email to usrp-users-le...@lists.ettus.com >
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