Hi Dr. Dickens, Reviewing the IQ calibration procedures, linked below, I came across this section which generated a few questions which are below the copy and pasted sections.
https://files.ettus.com/manual/page_calibration.html ---Frontend Corrections The calibrations for IQ imbalance and DC offset compensation rely on frontend correction logic that is located in the FPGA. Note that USRP E310, E320, N320, and B200-Series use a dedicated RFIC which does its own calibration. For those, any calibrations are very device-specific and are not covered in this section. --- First I would assume this statement is true for the N321 if it is true for the N320. Is that correct? Or is this incorrectly stated about the N320 because the schematic does not appear to have an RFIC? If the first question is true for the N320 and N321, then: Where do I find more information about the N320 and N321's dedicated RFIC IQ calibrations and DC offset? If I ran the calibrations mentioned in the linked page for the N320 and N321 what would be the effect on the SDR if they were applied? Would these SDR's ignore the calibration file? Thank you, Bill
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