Hello, I'm looking for advice on toggling an E320 GPIO pin at a specific uhd::time_spec_t. My use case is a UHD application that starts a long transmit burst at a known timespec, then later toggles a pin at a time corresponding to the Nth sample being transmitted. The pin controls an external RF switch. I recognize there will be some amount of group delay through the RFIC and internal analog components - my goal is just to be roughly synchronous with samples clocked out of the radio block.
As a first pass, I have a custom RFNoC block that counts valid samples from the start of burst and toggles the pin after the Nth sample (where N is provided in a user register). This is a poor solution because there is deep buffering downstream in the radio block, so my block sees "sample N" and toggles the pin several thousand sample-periods before it's transmitted. It isn't a fixed lag that can be added as a constant - consider that if N is small and "sample N" is observed when the FIFO is initially being filled, the toggle would occur while the corresponding sample is sitting in the back-pressured FIFO waiting for the transmit start time. Since this is synchronous manipulation of external state, and not just samples, I don't believe it will be sufficient to use CHDR header timestamps - the block would also need to know current radio_time, and I'm not sure how to get that in an RFNoC block.. Just wondering if I might be overlooking some simpler approach, or any advice on how to plumb this into a custom RFNoC block. Thank you, -David
_______________________________________________ USRP-users mailing list -- usrp-users@lists.ettus.com To unsubscribe send an email to usrp-users-le...@lists.ettus.com