But sine_tone module is not ip core there is some build-in define module that defines in lib folder USRP in this path uhd-4.1.0.5/fpga/usrp3/lib/rfnoc sine_tone is used in rfnoc_block_siggen block but for my custom block I faced with
RROR: [VRFC 10-2063] Module <sine_tone> not found while processing module instance <sine_tone_i> [/home/sp/rfnoc-test/rfnoc /fpga/rfnoc_block_gain/correlate.v:132] ERROR: [VRFC 10-2063] Module <rng> not found while processing module instance <rng_i> [/home/sp/rfnoc-test/rfnoc /fpga/rfnoc_block_gain/correlate.v:164] How am I adding non-ip core to my custom module..... I added a make file and make srcs files. For the building, I had not problem But with the simulation I have errors ..... thanks in advance On Sat, Aug 12, 2023 at 2:29 PM <edenmclaughlin...@gmail.com> wrote: > Greetings, > > I find the easiest way to include components to be by mimicing the > rfnoc-example found under the uhd/host/examples/rfnoc-example. > > I would recommend you to wrap your ip into a module > <https://youtu.be/uhEsG4i9dvc>, instantiate that module wherever you > please and create your makefile.inc (use the file as follows as a template) > like in here > <https://github.com/EttusResearch/uhd/blob/master/host/examples/rfnoc-example/fpga/ip/cmplx_mul/cmplx_mul.xci>, > and add references to the building tool file (such as cmakelist.txt) > whatever you are building the project with. > > Regards, > > Eden. > _______________________________________________ > USRP-users mailing list -- usrp-users@lists.ettus.com > To unsubscribe send an email to usrp-users-le...@lists.ettus.com >
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