On 09/08/2023 05:26, zhou wrote:
Thanks Marcus.
I find that it is easier to choose target RF at which DSP freq is
zero, then avoid DC in data allocation in baseband.
Anyway, what do "lowest offset" and "corrected " mean in the
calibration file? some example lines as below. I am uinsg step size 1MHz.
TX DC: 1020.000000 MHz: lowest offset -92.824059 dB, corrected
35.168568 dB
TX DC: 1021.001221 MHz: lowest offset -90.716408 dB, corrected
32.376762 dB
TX DC: 1022.002442 MHz: lowest offset -91.902306 dB, corrected
34.561279 dB
Kind regards,
Hongwei
I don't know. One could look at the code to get an idea.
On Monday, 7 August 2023 at 14:46:35 BST, Marcus D. Leech
<patchvonbr...@gmail.com> wrote:
On 07/08/2023 09:41, zhou via USRP-users wrote:
Thanks for your quick response, Marcus.
On the 2nd question, I mean, when LO is different from the target RF
freq, DSP will make up the difference. LO leak will become a spurious
signal at DSP freq. Can this LO leak be compensated in USRP? if yes, how?
If you move the LO leakage out of the passband of your application
sample rate, it won't be bothersome.
Thanks.
On Monday, 7 August 2023 at 14:11:08 BST, Marcus D. Leech
<patchvonbr...@gmail.com> <mailto:patchvonbr...@gmail.com> wrote:
On 07/08/2023 04:40, zhou via USRP-users wrote:
Hi,
I have a question regarding USRP calibration. I am using X310 and UHD
4.4.
To save calibration time, the step size is set to be 5MHz and the
freq range is [600MHz, 6GHz].
My questions are:
1. will the compensation be made at these discrete frequencies only,
or interpolation will be applied to frequencies which are between the
steps?
Interpolation is applied.
2. how to compensate DC offset in case there is DSP freq?
The DC offset compensation is applied based on the *analog* frequency
setting of the RF PLL. The DSP component
is "perfect" from a offset and balance perspective.
Thanks,
Hongwei
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