On 01/06/2023 15:16, Eugene Grayver wrote:
Hello,
I am building a high-end testbed and trying to decide on a 10 MHz
distribution option. I've used octoclock for other systems and it
'works.' However the datasheet is pretty sparse. Does anyone have
detailed specs (that you measured or from Ettus). I am interested in
the non-GPSDO version since my 10 MHz comes from outside the system
* port-to-port delay variation
* phase noise increase if any (assuming external source)
My other option is
https://endruntechnologies.com/products/distribution/10-MHz-low-phase-noise,
which is about 5x more expensive.
Thanks.
Clock is distributed via a CDCE18005 chip, made by TI. This chip is
specifically designed for low-phase-noise clock
distribution, and the trace layout on the board was designed to
minimize delay variation.
The 1PPS is buffered with a pair of 7404-type hex inverters, with one
inverter per package acting to invert the input,
prior to it being inverted again on each output channel.
I don't know that actual measured specs have been published for it.
Schematics are here:
https://files.ettus.com/schematics/octoclock/octoclock.pdf
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